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Colloquium - Burtscher

Automatically Synthesizing High-Speed Processor Simulators
Department of Electrical and Computer Engineering, Cornell University
12/9/2004
3:30pm-4:30pm

Processor simulators are quite popular in research and teaching environments. For example, functional simulators are often used to perform architectural studies, to generate program traces, to fast-forward over uninteresting code, and to warm up tables before switching to a more detailed but slower simulator. Unfortunately, most portable functional simulators are roughly two orders of magnitude slower than native execution.

This talk presents a set of novel techniques and optimizations to synthesize simulators that are only 6.6 times slower on average (16 times in the worst case) than native execution and 19 times faster than SimpleScalar's sim-fast on the SPECcpu2000 programs. When simulating a memory hierarchy, the generated code is 2.6 times faster than equivalent ATOM code. The fully automated synthesis approach does not require access to source/assembly code or debug information. It generates portable C code, integrates optional user-provided code, performs unwanted-code removal, preserves basic blocks, generates low-overhead profiles, employs a simple heuristic to determine potential jump targets, and utilizes mixed-mode execution, i.e., it interleaves compiled and interpreted simulation to maximize performance.

Martin Burtscher received the BS/MS degree in computer science from the Swiss Federal Institute of Technology (ETH) Zürich in 1996 and the PhD degree in computer science from the University of Colorado Boulder in 2000. He is an assistant professor in the School of Electrical and Computer Engineering at Cornell University. His research focuses on high-performance microprocessor architecture, instruction-level parallelism, and compiler optimizations. His current work includes hardware- and software-based value prediction, trace and message compression, self-optimizing hardware, speculative microarchitectures, and fast processor simulators.

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