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Colloquium - Stefanovic

ECOT 831

Performance Analysis Tools for Configurable Hardware
Department of Electrical Engineering, Princeton University

Configurable computing straddles the gap between the high performance of custom hardware and the high flexibility of software on general-purpose (embedded) microprocessors. The underlying technology of field-programmable gate arrays has matured to the point that configurable computing systems are becoming competitive and are finding applications in the military, scientific, and even consumer electronics domains. However, the complexity of application development for configurable computing has remained inordinately high: the masterful programmer must also be an adept VLSI designer; development tools are few; and solutions are not portable. Our project aims to remedy a part of the problem: to develop tools for performance analysis of applications as an aid to the programmer in deciding whether to use configurable computing capabilities and how. We will discuss the design of one such tool that is based on run-time program analysis, and show how it is used to assess the configurable computing potential of general-purpose applications (SPEC95) and specialized benchmarks (Honeywell ACS).

This talk is based on joint work with Margaret Martonosi.
Hosted by Amer Diwan.

The Department holds colloquia throughout the Fall and Spring semesters. These colloquia, open to the public, are typically held on Thursday afternoons, but sometimes occur at other times as well. If you would like to receive email notification of upcoming colloquia, subscribe to our Colloquia Mailing List. If you would like to schedule a colloquium, see Colloquium Scheduling.

Sign language interpreters are available upon request. Please contact Stephanie Morris at least five days prior to the colloquium.

See also:
Department of Computer Science
College of Engineering and Applied Science
University of Colorado Boulder
Boulder, CO 80309-0430 USA
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May 5, 2012 (13:29)